The reason phil said dx12 wont bring a massive change .. is because most devs will have been using it prior to its pc release when in regards to xbox one specific tasks.
Things take time.. new sdk just arrived full dx12 sdk wont be available till September. Its all alpha but with stereo driver.. fpga stuff dsp is also in its early stages.. Microsoft have to devs up to speed on new ways to do things... just like hardware it took time for people to show what could be done.
Misterx: Is it possible MS want Xbox One to be as low as possible?
Maybe they need change HW specs a little bit as new tech gets new revisions and they found a major flaws in design
Insider: Absolutely not... some devs only received there update this week.. gamescom will see huge positives.
Xbox one is out selling ps4 now.. seen some charts today .. the kinect bundle is selling extremely well despite the new bundle.
People just have to wait a little bit longer I know things did not go 100% to plan but I tell you this there is a reason for this . People on this blog know exactly what I am saying and so do you.. xbox one hasn't launched yet..
Insider: I see people asking what the mega ultra tone was ment to be ... I cant say now as it has only just been leaked through conversation and board meetings Remember the 3rd party studios there are many... but you keep what you kill.. or phil likes to own the I.p that Microsoft work on... 2.8 billion is the price to this address. :
This is to specific address the issue that Microsoft will not talk hardware.. well that has changed.. sdk talk will keep coming.. more and more talks and right up to tgs .. games will keep getting better and better.. and these talks will make it extremely hard for them devs to get away with not using xbox one...
I have told you mrx the console was not meant to launch till late 2014... from e3 on its going to be better and better..
Misterx: Can you check the right lines for us? mean that teach is inside xbox one http://www.hotchips.org/
Insider: Devs read the blog.. to see when things are coming... cos its taken 3 months for phil to get control of the company . Cliffy is right..
I will a sure you this amazing things are coming
Insider: I want you to understand we have a lot of people would like to see us go down.. there was more information that came before e3 which I new was lies to catch us out... that is why I posted the shenmue 3 and half life 3... these games are in dev I can asure you.. but I had to make a judgement and it worked..
Insider: I am working on a huge update of information. It is hard to explain what is going on.. the problem is trying to explain the axi bridge. Fpga programmable gate arrays. And arm co processing. Vector dsp. But there is a huge part of hot chips that was put out there but not explained. Even tho I new enough I still didn't understand how it worked on the programmable level.. there is a tone of stuff now. Slave /master ... are actually host/guest they confused the terms .. not sure why if its nda .. but
There missing blocks that connect to the axi bridge. You need to look at the shape audio block the yellow colors.... the gray blocks have nothing to do with audio other then they can process via reprogrammed logic.. its going to be very complicated to explain. But I am working and going to submit research docs diagrams that will brake this down...into manageable segments of information... there is 100% two system interconnect with x1 hardware and they are both accelerated too.. call the traditional cpu+gpu+gpugp master/host and the axi bridge slave / guest.
Forward compatibility is only possible via slave/guest hardware architecture. Same as ray tracing. This really is like a crossfire sli architecture then previously thought.. axi bridge interconnect new architecture with enhanced gpu+ cpu /gpugp / data move + esram.
The display plans there is two for gpu dual logic. And one for the snap feature which use the 4 cu on the cpu. It is also why the cpu has 4 cu's, and why the axi bridge connect directly to the master/host cpu and not the gpu... that is why the 4 cu are older simd.
And why the esram cluater is 16mb between the main/host cpu. So the dsp have access to cpu cach. main/master cpu
I will set the record straight very soon mrx :)
Would like to share information with mrc so that he can push the information even more.. nda stuff .
Insider: Mrx I will be working on a information peace over the next few days. It will touch on 90 % of x1 architecture .. and explain were the ray traciny dsp design derived from. .. its extremely complex information. But it will blow mrc away also.. :)
Insider: Its amazing how much information has been posted on the blog in the last few hours(misterx: page 3 and 4 of comments by Mistercteam in previos post).. its 99% inline .. iv spent hour going over white papers sdk information. And then boom its up... fpga asics scalable core vector.. dsp. Hmb memory cach. But like iv been saying its been right in front of your eyes...
Your biggest and most importantly clue is Axi Bridge.
Every ray tracing chip idea has this special bridge. Host guest or is it master slave :) its the future of interconnected gateways ...
Sgrt and amp c++ share similarities..
The reason why the high level engineering team for kinect voice control wont let other teams use this dsp processing reservation. Wait till the next sdk update comes around in august and September.. ant no voice ever been used on that dsp.. only yellow for audio 512 voices and dedicated plugin processing and surrounded mixing.. kinect voice commands have only ever been used via the soc within kinect the mic array.. 18 gops hhmmm how many watts even bigger clue.. dp.. specialized engines... there is even more connected at the Axi Bridge.
Its a testament to the blog how good the team is digging. You people are onto this good work mrc all most there.
That chines name @ hotchips 2014 !! Yeah you can find some much out if you digg his name. Ray trace chow. He has been involved in a team of other starting with T. Right back to 2007. 2012 ms licensed and brought them in to help design fpga axi and others. But Samsung help design so much but only through concept patients. Think what 64kb 32kb 8kb 32kb 16kb 8kb im sure you can understand scratch pad caching. Mobile rt gpu on a huge scale.. but benefits of keeping inline is less heat less power draw ...
Mrx ill do a deep dive with diagrams in my next information talk.. like I had planed but I feel mrc and others have earned the right to speak first there the ones who get put down.. remember dx12 is dead mantal opengl api this ... layered hardware .. the complexities within x1 are so hard to give the figures because it is evolving.. programmable logic is the future or fabric are they one in the same on a hardware or software side. Boom ... :)
Insider: Ryse 2 was in very early prototyping... one level .. open world ship to beach to ice mountain. I.p ant dead more on this subject @ gc, it will be addressed in some form officially. The crytek situation is hindered by the fact that unreal is coming in 2015. That is a problem and it can do rt elements. Crytek are 2016/17 for that engine update. Middle/3rd party licensees are not happy and that is why contracts got cancelled. Will ms purchase or fund other projects in the future I have heard yes. But when ms spend and invest in 2nd party or joint funding agreements they would like to obtain more leverage over these I.p's. Technology to software is evolving on the console front. And that is a burden on development studios as well.. ms have there own engine sdk and apis now. And they are heavily involved with unreal development.
Capcom would be 1st party. Crytek 2nd party. In a perfect sense. Or ms could invest 4 billion in true 1st party studio's. What do people on the blog think. Do or dont. Co's you keep what you kill this generation :)
Part 32. More details on 768 ops/cycle (768 SPU) and why there is more RAM with gigantic bantwidth needed to feed each SPU for RayTracing type of tasks. Why that RAM is already there and called HBM.
Mistercteam: Sometimes ago 2002-2005, Berkeley + Stanford try to combine SRAM/eDRAM/DRAM + ALU logic
They called it VIRAM
X360 eDRAM is same on principle
but little programmibility, only target for free AA, etc
10MB + 192 ALU in fusion
so what about stacked Memory + SRAM + Compute Cores in fusion ---> it is X1
it is why eSRAM = on MS slide = General Purpose RAM
basically we see the block as memory
but the main funtion like on X360 is more than that, not just for eDRAM they fused in 192 ALU with 10MB eDRAM
on X1 , MS further enhance it to be like for general compute too
Mistercteam: This is my assumption, after comparing so many configuration
from 768 Op/cycle = 768 SPU
192 of it are part of what we called 12-14CU but 128 ALU
there is many SPU left for spare in the future
512 of it are the nextgen part
512 x 64 KB local sram = 32768 MB
512 x 8 MB local stacked memory = 4 GB additional stacked memory unrevealed
(some indies leaked their devkit spec,stated they got 12GB, as we know devkit = retail, only the devkit is enabled some of its features)
so the eSRAM is yes = 32768, after seing the audio block = 64KB labeled esram
per SPU control 8 ALU
also Xtensa 10 (MS said Project Turn 10, 10 Forward)
is support 8 MB per SPU block + xx KB of eSRAM
this also fit with insider + Albert sometimes ago that said DDR = 272 GB/sec
as there is stacked memory too, this is for locality per SPU in tandem with eSRAM
Misterx: for thouse who need more please read Mistercteam research on page 3 and 4 to previos post.
Part 33. Now all comes full circle. Full Xbox One architecture explanation
all now inline, and fit .....
include 128 ALU
include insider said as R9 280x
include 4TB/s insider said 2012 of Oban SOC,
thats why ray tracing is possible
The Similarity of X1 Audio block with Cell SPU/SPE
also the BW of it multiply with 256 (per 16MB) or 512 (32MB) equal to ~ 4TB/s
same as insider said per 2012, thats why he said ray tracing is possible
also fit with 768 SPU distribution, and Gfx accelerator = 192-224 SPU =
12-14 Shader core
eSRAM is next next next future Viram/imagine concept
eDRAM is limited programmable on 192 ALU, X1 esram is full prgrammable
GP compute/GPGPU , esram block
Now All fit with epic Tim Sweeney
i posted below per 2012-2013,
but now fit with above slide and prev digging
also MrX insider Info.
remember 2-4TB/s is BW inside esram Block
not the BW from host to eSRAM block !!!
Misterx: MInd blown. That is really full circle where all inline and feet. Mistercream for president! That is and IBM engeener level of research. Hats off to Mistercteam for digging out insider info finally.
Insider will also create its diagrams. Hope they will be easy for non tech guys.
Made some gifs...